The failsafe CPU board equipped with improved processing capabilities (32-bit RISC-CPU) has been adopted for integrating the processing system. The processing section of one unit of the equipment handles ATC code determination for 32 railway tracks, and signal processing.
The amplifier needed for each railway track has been doubled in a simple configuration, thereby reducing costs without reducing reliability.
The equipment consists of a processing section that centrally processes signal and sign indication logic, signal generation, modulation, failure detection and other functions, and a transmission section that amplifies signals for individual train tracks. The volume of I/F cables has been significantly reduced through adoption of the LAN I/F and integrating the processing systems. |
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The ATC telegram messages transmitted by the ground facilities via the rails have been added with prefix comma-free (PCF) and CRC signals for 20-bit frames of data, making the frame data 36-bit.
By adopting the multiple consistency logic that reflects consistency between two out of three telegram messages on control, the information reliability has been enhanced. |